1. Field of the Invention
The present invention relates to a mobile communication system, and more particularly to a mobile station for a CDMA (Code Division Multiple Access) mobile communication system which uses pilot signals inserted in a forward link for data demodulation, and a detection method to be used at the mobile station.
2. Description of the Related Art
A coherent detection method using a PLL (Phase Locked Loop) circuit and a differential detection method are known as conventional detection (demodulation) methods.
With the coherent detection method, shifts of a carrier frequency and phase in a carrier band between transceivers are compensated by a PLL circuit at a receiver side. In a mobile communication system incorporating a coherent detection method, a PLL circuit cannot follow the state (dynamic characteristics) when fading or the like is generated because of a moving mobile station, and there is a problem of a considerably degraded error rate performance.
With the differential detection method on the other hand, data is converted into phase differences of a transmission signal by differential coding, and transmitted from a transmitter. At a receiver, data is demodulated by differential coding without obtaining the absolute phase of data. With this method, although it is not necessary to make the frequency and absolute phase coincide both at the receiver and transmitter, the error rate performance is degraded even at the state (static characteristics) when a mobile station is at a standstill.
As one of the detection methods for ensuring that the error rate performance is not degraded in both the dynamic and static characteristics, a data demodulation method has been proposed which uses pilot signals inserted in a forward link (channel), as described, for example, in "A study on Demodulation Method for CDMA Mobile Phone", by Hideshi MURAI et al., Spring Symposium of 1994 of the Institute of Electronics, Information and Communication Engineers, A-5 Spread Spectrum, A-268, p. 1-270 (1994).
FIG. 2 illustrates the procedure of signal modulation/demodulation at a base station 51 and a mobile station 52 in a conventional CDMA mobile communication system using pilot signals inserted in a forward link.
The base station 51 converts a transmission signal (data signal) to each mobile station 52 into two series of data signals (I, Q) 50 by a serial-parallel converter or coding circuit, and supplies the data signals I and Q to respective multipliers 501A and 501B to spread them by using spreading codes (PN.sub.-ID, PN.sub.-QD)) 54 for data symbol.
For example, as the spreading codes, codes of a 128-chip length having a symbol rate 128 times faster than that of the data signals. Each code (bit "1" or "0") of transmission data is converted into a code pattern made of 128 chips and into a phase inverted code pattern.
The data signals I and Q spread by the spreading codes 54 are quadrature-multiplexed at the multipliers 502A and 502B, for example, by QPSK (Quadrature Phase Shift Keying), thereafter added together by an adder 503, and transmitted from an antenna in the form of radio waves in a radio frequency band 55. FIG. 10A shows a relationship between the combinations of the values ("1" and "0") of the signals I and Q and the signal constellation by QPSK.
In order to communicate with a plurality of mobile stations, the base station assigns a spreading code for data symbol specific to each mobile station to form a plurality of signal channels. For example, at a channel X, the data signals I(X) and Q(X) are spread by spreading codes PN.sub.-ID (X) and PN.sub.-QD (X) specific to the channel (X), whereas at a channel Y, the data signals I(Y) and Q(Y) are spread by spreading codes PN.sub.-ID (Y) and PN.sub.-QD (Y) specific to the channel (Y).
In addition to data signals for a plurality of channels, the base station 51 transmits pilot signals which are used as a reference signal at each mobile station 52 for the demodulation of data signals. For the pilot signals, two series of signals I(P) and Q(P) having a fixed bit pattern (continuous pattern of bits "1") are spread by spreading codes PN.sub.-IP and PN.sub.-QP specific to each pilot signal channel having a chip pattern different from that of the spreading codes 54 for data symbol, quadrature-multiplexed in the manner similar to data signals, and transmitted as radio waves in the radio frequency band 55 same as that of data signals.
FIG. 2 shows a quadrature multiplexing circuit only for a single channel for the simplicity of the drawing. In an actual CDMA transmission circuit, signals of a plurality of channels (data signal channels and pilot signal channels) spectrum-spread by specific spreading codes are multiplexed for each of the I and Q signal components, and supplied to the multipliers 502A and 502B for quadrature multiplexing.
At each mobile station 52, signals received by the antenna are supplied to multipliers 504A and 504B to quadrature-detect them by signals having a local oscillation frequency and generated by an oscillator 520. Output signals from this detection circuit are supplied to LPFs (Low Pass Filters) 56A and 56B to eliminate high frequency components and obtain reception signals (I', Q') 1.
Since an oscillator 510 for quadrature multiplexing at the base station and the quadrature detection (demodulation) oscillator 520 at each mobile station operate asynchronously, the detected reception signals (I', Q') 1 contain signal value errors caused by a phase shift (or frequency shift) from the phase (frequency) at the modulation side. The quadrature detection by the oscillator 520 is tentative so that the reception signals (I', P') 1 are required to be subjected to signal processing for eliminating phase errors (hereinafter called "phase correction").
FIG. 3 shows the structure of a conventional mobile station detection circuit for removing signal value errors caused by the phase shift, from the reception signals (I', P') 1, and for regenerating the data signals (I, Q) same as that transmitted from the base station.
A pilot signal despreading circuit 21 despreads the reception signals 1 by using spreading codes 26 for pilot symbol, and generates phase error signals (.DELTA.cos.phi., .DELTA.sin.phi.) 22 changing with a phase shift angle. An averaging circuit 23 averages the phase error signals (.DELTA.cos.phi., .DELTA.sin.phi.) 22 outputted from the despreading circuit 21, for a period of a plurality of chips, and generates correction signals (.DELTA.COS.phi., .DELTA.SIN.phi.) 24 which are supplied to a phase correction circuit 30. A spreading code generation circuit 25 Generates spreading codes (PN.sub.-IP, PN.sub.-QP) for pilot symbol to be supplied to the pilot signal despreading circuit 21 and spreading codes (PN.sub.-ID, PN.sub.-QD) for data symbol to be supplied to a data signal despreading circuit 32 to be described later. The spreading codes (PN.sub.-ID, PN.sub.-QD) for data symbol have a code pattern specific to each signal channel.
A delay circuit 28 delays the reception signals 1 by a time duration corresponding to the time required for the averaging circuit 23 to perform an averaging process for the phase error signals (.DELTA.cos.phi., .DELTA.sin.phi.). The phase correction circuit 30 corrects the phases of signals 29 outputted from the delay circuit 28. A data signal despreading circuit 32 despreads phase-corrected signals 31 by spreading codes 27 for data symbol. Accumulators 34 convert data signals 33 outputted from the despreading circuit 32 and having the chip rate into demodulated data (I, Q) having the symbol rate of the transmission signal.
Referring to FIG. 10B, a relation between a transmission signal from the base station and a reception signal 1 at a mobile station will be described, while paying attention to a pilot signal whose signals (I, Q) are always transmitted as values (1, 1).
A pilot signal P1 transmitted at the base station with a value (I=1, Q=1) at the first sector in the I-Q signal constellation changes to a signal having a value (I=i', Q=q') at the mobile station in the I'-Q' signal constellation, assuming that the phase shift angle is .phi.. If the phase shift angle .phi. is greater than .pi./2, the pilot signal P1 is received at the mobile station as a signal in a different sector (second to fourth sectors) in the I'-Q' signal constellation, and takes a value quite different from the transmission signal at the base station.
On the assumption that the pilot signal P1 has essentially a value of i=q in the first sector in the I'-Q' signal constellation as indicated by a point P2, the phase shift amount (angle .phi.) between the I'-Q' signal constellation and the I-Q signal constellation is detected from the values of I and Q components of the received pilot signal.
Referring back to FIG. 3, the pilot signal despreading circuit 21 despreads the received signals (I', Q') 1 by using the spreading codes 26 for pilot symbol. Of the reception signals 1, the signal components I' are inputted to multipliers 210A and 211A, whereas the signal components Q' are inputted to multipliers 210B and 211B. PN.sub.-IP of the spreading code 26 for pilot symbol of the I components is supplied to the multipliers 210A and 210B, whereas PN.sub.-QP of the spreading code 26 for pilot symbol of the P components is supplied to the multipliers 211A and 211B. Outputs of the multipliers 210A and 211B are added together by an adder 212A, whereas outputs of the multipliers 210B and 211AB are subtracted by a subtractor 212B.
Because of the above-described phase shift, both the reception signals I' and Q' contain both the I and Q components of the transmission pilot signals. At the pilot signal despreading circuit 21, the reception signal I' is despread by the spreading codes PN.sub.-IP and PN.sub.-QP to obtain the Ii and Iq components of the pilot signal, whereas the reception signal Q' is despread by the spreading codes PN.sub.-IP and PN.sub.-QP to obtain the Qi and Qq components of the pilot signal. Furthermore, the Ii and Qq components are added together by the adder 212A to obtain the phase error signal .DELTA.cos.phi. proportional to COS.phi., whereas the Qi components are subtracted by the Iq components by the subtractor 212B to obtain the phase error signal .DELTA.sin.phi. proportional to SIN.phi..
The averaging circuit 23 averages the phase error signals (.DELTA.cos.phi., .DELTA.sin.phi.) 22 outputted from the despreading circuit 21 for a period of a plurality of chips, and generates phase correction signals (.DELTA.COS.phi., .DELTA.SIN.phi.) 24 with noises being eliminated.
The averaging circuit 23 is constituted by, for example as shown in FIG. 4, two analog value shift registers (serial to parallel converters) and two adders 235 and 236. The two shift registers are constituted by a plurality of one-chip delay gates (Dc) 230 connected in series for shifting the phase error signals .DELTA.cos.phi. and .DELTA.sin.phi.. The adders 235 and 236 add the output signals from the respective delay gates 230.
A delay gate Ds corresponding to one symbol is formed by serially connected one hundred and twenty eight one-chip delay gates (Dc) 230. In this example, each shift register is constituted by serially connected three symbol delay gates 231, 232, and 233, and the values of the phase error signals .DELTA.cos.phi. and .DELTA.sin.phi. corresponding to the 128.times.3 chips continuous on a time axis are added together by the adders 235 and 236 to thereby obtain the phase correction signals .DELTA.COS.phi. and .DELTA.SIN.phi. with noises being eliminated through averaging.
The delay circuit 28 is constituted by, for example as shown in FIG. 5, two analog value shift registers (delay circuit) each formed by a plurality of serially connected one-chip delay gates Dc 280. The number N of delay chips required for the averaging circuit 23 (in this example, N=128.times.3) and the number M of delay chips required for the delay circuit 28 satisfy the condition of M=(N-1)/2.
This condition is set because the phase errors of the received data signals are corrected by the phase correction values obtained by a set of pilot signals extending before and after the received data signals by a predetermined number of chips.
In this example, M=191.5. Therefore, the number M of delay chips is set to "191" or "192". Ds 281 is a delay gate unit corresponding to one symbol having one hundred and twenty eight one-chip delay gates Dc 280. In order to set the total number of delay chips to "191" or "192", the delay gate unit 281 is connected to a half symbol delay unit Ds' 282 which is constituted by sixty three or sixty four one-chip delay gates Dc 280.
In the phase correction circuit 30, for example as shown in FIG. 6, the I' and Q' components of delay data 29 outputted from the delay circuit 28 are multiplied respectively by the correction signals 24 of COS.phi. and SIN.phi. by multipliers 301A, 301B, 302A, and 302B, and addition and subtraction are performed by an adder 303A and a subtractor 303B to correct the errors of the received data signal values caused by the phase shift. In this manner, the data despreading circuit 32 can demodulate received data signals (I, Q) 35.
As described above, in the detection circuit of a conventional CDMA mobile communication system, an averaging process of phase errors detected from pilot signals and a delay and phase correction process of received data signals are both performed at a chip rate of spreading codes. Therefore, the circuit portions for performing these processes are required to be operated synchronously with high speed clocks, so that the constituent components of the detection circuit become expensive and a power consumption becomes large.